Unimodular Hypergraph based clustering approaches for VLSI Circuit Partitioning
نویسندگان
چکیده
The reliability of Integrated circuits mainly depends on the VLSI Design Automation techniques. The main problem faced in these techniques is the Physical Design Implementation. The size and performance parameters of an integrated circuit mainly rely on the three main domains of Physical Design which are Placement, Partitioning, and Routing. In this paper, the problem domain is expressed in Unimodular Hypergraph. Comparison between Two-Step cluster method, Divisive-Hierarchical Cluster technique and the K-medoid cluster technique is analyzed. The Unimodular Hypergraph is used to obtain the maximum flow at a particular node and also to minimize the time between to nodes.
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